Basic principle

In the previous chapter, $g_m$ of a MOSFET is considered as constant and its nonlinearity is ignored. However, drain current of a MOSFET is represented by

$$I_D = K(V_{gs}+v_{in}-V_T )^2$$

$$= K(V_{gs}-V_T )^2+2K(V_{gs}-V_T )v_{in}+Kv_{in}^2$$

$$= I_{D0}+g_mv_{in}+\alpha v_{in}^2$$ (11)

where $V_{gs}$ and $v_{in}$ is a gate-to-source bias voltage and an input signal voltage respectively and $\alpha$ is a coefficient. The first term of the right side of Eq. (13) means a constant bias current, the second term is a desired current which is proportional to the input voltage, and the last term is a undesired nonlinear components. Only when the input voltage is sufficiently small to ignore the third term of Eq. (13), a MOSFET is considered as linear. In order to improve the linearity of an active inductor, an effect of the third term of Eq. (13) must be minimize. A variation of the drain-to-source voltage of a MOSFET also cause distortion. In this paper, only nonlinearity of $g_m$ of a MOSFET is discussed because nonlinearity of a transconductance gives more strong influence on the linearity of a active inductor.

Figure 7: Principle of distortion reduction technique

Figure 7 shows a basic principle of the proposed distortion reduction technique. Fig. 7(a) or (b) is used instead of a n-channel MOSFET which acts as a linear transconductor. When a drain terminal of the MOSFET is used as an output terminal, the MOSFET is replaced by Fig. 7(a). When output node is a source terminal, Fig. 7 (b) is used. Output current of Fig. 7 is

$$I_o = I_D-I_c$$ (12)

where $I_c$ is compensation current. If $I_c$ contains the same nonlinear components with $I_D$, $I_o$ becomes

$$I_o = (I_{D0}+g_mv_{in}+\alpha v_{in}^2)-(I_{c0}+\alpha v_{in}^2)$$

$$= (I_{D0}+I_{c0})+g_mv_{in}$$ (13)

where $I_{c0}$ is DC component of $I_{c}$. The nonlinear components of $I_D$ is canceled out. This compensation current $I_c$ is also realized by a n-channel MOSFET M$_c$. It is assumed that M$_1$ and M$_c$ have the same aspect ratio. When a gate-to-source voltage of M$_c$ contains $\pm v_{in}$, the drain current of M$_c$ becomes a compensation current. When gate-to-source voltage of M$_c$ is $V_{GSc}-v_{in}$, $I_o$ becomes

$$I_o = K(V_{GS1}+v_{in}-V_T)^2-K(V_{GSc}-v_{in}-V_T)^2$$

$$= K(V_{GS1}+V_{GSc}-2V_T)(V_{GS1}-V_{GSc})$$

$$+2K(V_{GS1}+V_{GSc}-2V_T)v_{in}.$$ (14)

A current which is proportional to $v_{in}$ with offset current is obtained.